Article View: comp.lsi
Article #1139Dense VLSI Packaging
From: Don Kark
Date: Sun, 04 Sep 1988 02:36
Date: Sun, 04 Sep 1988 02:36
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1163 bytes
I'm interested in finding out about dense packing techniques for VLSI
dies. I've heard of hybrids and another technique called Chip-On-Board
(COB). Does anyone have any pointers to information on these packaging
techniques?
The particular application I'm thinking about would make use of many dies,
with few (less than 100) external connections. Hybrids sound like a very
expensive way to go. Are COB's for real? What are advantages/disadvantages
of this packaging technique? Thanks in advance for any help.
-- Don
--
=============================================================================
Don Kark | {cit-vax,trwrb,uunet}!wiley!don
TRW Inc. | wiley!don@csvax.caltech.edu
Redondo Beach, CA | don@wiley.uucp
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!rutgers!ucsd!ucsdhub!esosun!seismo!uunet!wiley!don From: don@wiley.UUCP (Don Kark) Newsgroups: comp.lsi Subject: Dense VLSI Packaging Keywords: COB, Hybrid Message-ID: <2483@wiley.UUCP> Date: 4 Sep 88 02:36:37 GMT Organization: TRW Inc., Redondo Beach, CA Lines: 18