🚀 go-pugleaf

Unfortunately, there is no one good source of descriptive information
on VHDL.  I expect to see a few more books in the near future appearing
to discuss the language and modeling techniques in general.

=The bible is:

 IEEE Standard VHDL Language Reference Manual, IEEE
   IEEE Std 1076-1987

=One book already in print is:

 Armstrong, James.  CHIP LEVEL MODELING WITH VHDL, Prentice-Hall, 1988.
    CALL NO. -  TK 7874 .A75 1989

 (this goes through some of the basics in modeling, a few holes here 
  and there, but in general a good book)

 
= Design&Test, April 1986 issue, IEEE
  
 (Although outdated, since it looks at the DoD versions of the language,
  it can be valuable in understanding some of the reasoning behind the
  language.)

=Numerous Magazine Articles and Papers

 Check out the last couple years of DAC proceeding for papers.  Articles
 have appeared in VLSI Systems Design, EDN, and other places describing
 the language and it uses.

 one article that comes to mind, discusses some basics;
 Behavioral Description in VHDL; Dave Barton of Intermetrics,
 VLSI System Design, June 1988


hope this helps

joe
--
Joe Kagenski -CAE Logic Design Tools * ARPA: kagenski@apollo.com   (129.248.0.1)
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