🚀 go-pugleaf

In article <8904211724.AA08448@cunixd.cc.columbia.edu> gld@CUNIXD.CC.COLUMBIA.EDU (Gary L Dare) writes:
>Would readers care to share their opinions on some of the CAD tools
>offered (or once offered) by universities?  The obvious ones that come
>to mind are:
>
>1. Magic
>2. Vivid
>3. Caesar
>
>All three of these are in wide use, but their development has been
>discontinued.
>
>Also, there is a new program from Berkeley called OCT; does anyone
>have any experience with it that they'd care to share?
>
>gld

	I think that it all depends on what you want to do with the tool.
As teaching tools, I would say that Magic and Vivid have their days counted.
As far as Caesar, I never used it but I used Kic which is similar, I think that
no matter how good tools get, simple mask level editors such as these will
always exist and be used.

	Oct is not a program, it is a collection of tools that together make for
a good design environment. The little experience I have had with the Oct tools
tells me that it should be the teaching tool of choice in conduction with much
simpler packages such as Kic.

	I think that the VLSI training should have the following levels and the
proper tools at each level:

	1) VLSI Circuit & System  - How to design VLSI circuits from specs, 
	   concentrating mostly on circuit and device aspects.

	VLSI Circuit and System Design courses should expose the students to
low level mask editing, for it is the only way that they will learn what it
all means. I would compare this to having to learn at least one kind of ASM
in most C.S. programs, this is regardless of how good high level languages 
have become, it is still in their best interest to learn it first so that they 
can go on to bigger and better things.

	2) VLSI Testing 	  - How to design VLSI circuits that can be 
	   properly tested and characterized.

	In VLSI Testing courses the students should have tools that can help
in developing good test vector sets depending on the types of coverage  needed
and to allow to experiment with the different testability techniques. Such tools
are partially available from different sources.

	3) VLSI Technology	  - How to design VLSI fabrication technologies
	   and what is involved in the  development of different processes.

	Sorry but I do not know much about any tools in this area other than
a process modeling package from CMU.

	4) VLSI Architecture	  - How to design VLSI Chips taking into account
	   all of the architectural and testability issues.

	In VLSI Architecture courses, one should assume that the students 
already have enough VLSI background and are more interested in experimenting
with new ideas related with the chip floorplan, signal and utility bus routing,
etc.. At this level one would better use more automated tools to avoid the 
little details that are no longer interesting. I would use tool sets such as Oct
and Vem, or VNPR ( place and route ), etc to be able to experiment with more
immediate results.

	5) VLSI Design Automation - How to design VLSI CAD tools to help in all
	   of the different levels of VLSI design, with a concentration on the
	   implementation of tools.

	This is the place where students should get a chance to improve on
existing tools or creating news ones.

	6) Any other more abstract related courses that can build on the above.
 
	I know that there are many schools out there that have this type of
outline for their VLSI courses, however, I know that there are also some 
schools that try to do too much in one course and are employing the wrong 
types of tools. I would like to see an undergraduate specialization in VLSI
as an option for Computer Engineering/Science students. Any takers ?


	Sorry if it ended up being abit long, but I could not help it.
-- 
________________________________________________________________________________

Name:	Marco Zelada			Phone:	617 353 9882, Fax: 353 6322
	VLSI CAD Engineer 		E-mail:	marco@buengc.bu.edu	
Dept:	Electrical & Computer Eng.	Mail:	44 Cummington St. Room 236
Org:	Boston University		 	Boston MA, 02215
________________________________________________________________________________