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Article #1348Example/Benchmark circuits with Memory
From: Steve Wilton
Date: Mon, 29 May 1995 00:00
Date: Mon, 29 May 1995 00:00
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1475 bytes
Hi, We are performing research into memory architectures on FPGAs. More specifically, we are looking at how large (several Kbit) configurable SRAM arrays can be included on an FPGA along with logic resources. To evaluate some of our ideas, we need benchmark circuits. Unfortunately, all the "standard" benchmark suites (as far as we know) contain circuits without memory. If anyone has circuit descriptions (with memory) that they are willing to part with, we would be grateful. We are looking at circuits with less than (about) 30,000 gates of logic, and less than (about) 64Kbits of memory (significantly smaller circuits are OK too). The netlists can be in any format (as long as we can understand it). If you can help us out, please send email to: wilton@eecg.toronto.edu Thanks!
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 104c88,228c4f46292dab19,start X-Google-Attributes: gid104c88,public X-Google-Thread: f70d0,228c4f46292dab19,start X-Google-Attributes: gidf70d0,public X-Google-Thread: fec08,228c4f46292dab19,start X-Google-Attributes: gidfec08,public From: wilton@eecg.toronto.edu (Steve Wilton) Subject: Example/Benchmark circuits with Memory Date: 1995/05/29 Message-ID: <1995May29.115209.26856@jarvis.cs.toronto.edu> X-Deja-AN: 103504313 x-nntp-posting-host: cyclops.eecg.toronto.edu organization: Department of Computer Engineering, University of Toronto newsgroups: comp.lsi,can.vlsi,comp.arch.fpga