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Article #233Re: Question regarding probe pads
From: Rajesh K. Gupta
Date: Fri, 04 Sep 1992 17:13
Date: Fri, 04 Sep 1992 17:13
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> Some points about landing probe pads inside a design chip seems to be unclear to me. > Hope some kind soul would be able to help me out. > > Say I want to probe a point in the circuit, which is a point inside a standard cell. > Since standard cells are designed very compact - I have the following question. Is the > standard practice is of landing probe pads inside standard cell, or that of taking a > metal(?) wire out from the point and placing the probe point at a convenient point > outside standard cells. > typically a picoprobe can be safely manipulated for distances in ten's of microns (a 20x20 u pad would be enough). However, most common practice today is to use voltage-contrast enhancement techniques on ebeam reflections. A 5x5 pad in topmost metal layer would be sufficient. If surrounded by a ground line, it would be even better. Of course, the tester would cost more. Rajesh 725-1776 CSL Modulars I rgupta@sirius.stanford.edu
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Newsgroups: comp.lsi Path: arc1-ca.pugleaf.net!sparky!uunet!stanford.edu!leland.Stanford.EDU!sirius!rgupta From: rgupta@sirius.Stanford.EDU (Rajesh K. Gupta) Subject: Re: Question regarding probe pads Message-ID: <1992Sep4.171306.26970@leland.Stanford.EDU> Keywords: probe pads Sender: news@leland.Stanford.EDU (Mr News) Reply-To: rgupta@sirius.Stanford.EDU (Rajesh K. Gupta) Organization: Stanford University References: <tapas.715573218@femto.engr.mun.ca> Date: Fri, 4 Sep 92 17:13:06 GMT Lines: 28