🚀 go-pugleaf

In article <1537@gold.GVG.TEK.COM>, grege@gold.GVG.TEK.COM (Greg Ebert) writes:
 
> Many vendors will provide design 'kits' which let you use Daisy, ViewLogic,
> or other schematic capture packages for design entry. Be careful. I have
> ALWAYS seen problems during database conversion. Another hassle is back-
> annotation of layout delays, etc. It's probably cheaper to use a 'design kit'
> but it's more hassle than using the vendor's CAD tools. An alternative is to
> do work inside the vendor's design center. I strongly recommend this approach
> if (a) It's the first design with the vendor, and (b) you are considering
> purchasing their tools. Some vendors will loan their tools free of charge for
> a 'test drive', especially if you book a design with them.

I've recently done some gate array design using Motorola's 2 micron cmos
family, on a Daisy "personal logician" station.  We used the Motorola
design kit (Motorola-provided libraries and post-processing tools) for
the Daisy environment.  We had no problems with database conversion, or
with delay back-annotation.  In fact, the process went extremely smoothly.
The chips even WORKED!

The only problems were:

1) Daisy software bugs.
2) The Motorola design kit was for earlier versions of the Daisy tools than
   the latest (but we had the working versions on hand).

Daisy support problems, and the desire for broader ASIC vendor options
led us to get Mentor systems for our next designs.  I'm doing another
Motorola chip (1 micron cmos), and will report on the process (if anyone
is interested).

-- 
      Paul M. Elliott      Optilink Corporation     (707) 795-9444
               {uunet, pyramid, tekbspa}!optilink!elliott
"an archetypal entity..., superimposed on our culture by a cosmic template."