🚀 go-pugleaf

In article <1991Mar11.215449.8066@lonex.radc.af.mil> ratazzie@lonex.radc.af.mil (Edward P. Ratazzi) writes:
>SPICE3 3 -> run
>Warning: resuming run in progress.
>Warning: Gmin step failed
>Warning: Gmin stepping failed
>Warning: source stepping failed
>doAnalyses: Improperly formed matrix - shouldn't happen!(preOrd)

The first thing I would do is check your circuit to make sure
you aren't doing anything silly.  Since the circuit worked on the
other SPICE version, I guess it passes this test.

GMIN is the minimum conductance of any branch.  This conductance is in
parallel with every branch (thus also parallel with transistor junctions).
I believe if there is a problem with convergence, the effective GMIN is
stepped up to the max value set in the .OPTION statement.

I encounter this area typically when the Vgs of my transistors is very
close to zero (less than 0.1V).  Here's a list of ways to avoid
the GMIN stepping syndrome:

1) use .IC to set initial conditions on gate voltages so the Vgs of
   every transistor is at least 0.2V when the simulation begins
   ...or...
   If you are doing a .DC analysis, ensure that your voltage
   source doesn't bring the Vgs of any transistor below 0.2V
   ...if this doesn't work...
2) increase RELTOL (the relative accuracy of V's and I's) up to 
   0.005 using a .OPTION statement.  Then try 0.01, 0.02, etc.
   Try combinations of ABSTOL larger than 1pA, and CHGTOL larger than
   .01pC.  You will find, however, that if you adjust RELTOL much
   larger than 0.01 that transient analyses will begin to behave 
   a little on the chaotic side.
   ...if you are at the end of your rope...
3) Increase the GMIN in the .OTION statement up from 1E-12 Ohm^-1.
   Notice that when you significantly increase your GMIN, a lot of
   current can leak to places you never expected it (gee...why is
   my oscillator going that fast!).

Good luck! 
-Thomas Edwards