🚀 go-pugleaf

I would like to know about any ongoing research in circuit models of 
interconnect, in particular models amenable to automatic extraction from
layout; i.e. computer recognition of layout structure and transformation 
of such structure in to discrete/distributed circuit elements. I would
appreciate if you can give me some pointers, or better still, if you work
in this area, your willingness to communicate ideas. Thank you much.

My mail path:
    {the rest of net}!{hplabs,quantel,amdcad,decwrl}!intelca!cadev2!ekwok

If you would like to reach out: 408-9877497
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