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Article #521

Re: Dual Celeron's and SMP Performance Problems

#521
From: Totally Lost
Date: Thu, 27 May 1999 00:00
82 lines
4335 bytes
In article <7ij3co$14s$2@sparcserver.lrz-muenchen.de>,
  kuhn@lpr.e-technik.tu-muenchen.de.nospam wrote:
> In comp.os.linux.hardware mumford <mumford@netcom.com> wrote:
>
> : On a semi-related note, PPro's meant for normal consumption had only
> : 256K L2 cache.  PPro's meant to go in servers could have 512K or
1MB.
> : These PPro's were *much* more expensive.  I think the 1MB'ers were
> : going for a couple of thousand dollars at one point... *just* the
CPU.
>
> : I know for a fact that a particular company I worked for (who shall
> : remain nameless) wanted those larger-cache PPros very much.  They
> : were not satisfied with 256K.
>
> Then they had an application were 256K are not enough.
> You may have an application were 4MB are not enough.
> But you may also have an application were 32K are enough.

and you might have an application where under 1K is enough and use a
bunch of 100MHz Scenix SX-28AC100's at a $5.00 a piece. There
are a lot of small number crunching problems where $500 of
these would smoke a bunch of dual Celerons.

But that is not what this thread is about. I started it with
the statement that there are:

	A) A lot of small applications where dual Celerons would rock.

and

	B) A lot of slightly larger applications where dual Celerons
	   would suck, and PII's would win.

So far you have tried to prove B wrong by asserting A, which was
already a given and has absolutely nothing to do with the truth or
falseness of B.

>
> It's only a question of code and data locality - at least
> it only depends on _your_ application.

And the foot print and locality of reference of the host OS, that
is of course if multitasking, filesystems, networking, GUI's and
other typical services are required on the system at the same time.

The working set for these services are considerable larger than
32K, and in fact larger than 128K.

>
> Of course, i'd like to own a Dual Xeon 500 with 2MB each,
> but for the same price, i get a cluster of ten or more Dual Celeron
400.
> Depending on the application, the Cluster may be 7 times faster
> then the Xeons, but they may be only 1/7 the speed as well.

A Supermicro S2DG2 with Dual Xeon 500/2MB's is about (4159*2)+585,
or roughly $9,200 in a box with memory and a disk, and about $10K
with fast software raid. The system will handle just about any
application you could toss at it, save certain research, military and
Fortune 500 MIS applications. In most cases, another couple grand of
upgrades would solve the fit problem. CPU power roughly 2K MIPS.

10 $1,000 dual Celeron 400's are pretty skimpy systems by comparison,
the set of applications they will handle is much smaller - in fact
pretty much limited to a bunch of small foot print jobs. CPU power
roughly 8K MIPS.

At roughly the same cost, an array of 1800 $3.50 Scenix SX-28AC100's
with a dual PII 333 I/O processor handles even a smaller set of
applications limited by the dual PII/333 and the very small
working set restrictions of the Scenix array processor. Total CPU
power is roughly 181K MIPS.

Each system has significantly restricted applications then the previous.

What's the point ... apples and oranges comparisons are a waste of
time.


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From: Totally Lost <idletime@my-deja.com>
Subject: Re: Dual Celeron's and SMP Performance Problems
Date: 1999/05/27
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