🚀 go-pugleaf

In article <x5sn3m59wg.fsf@tupik.goethe.zz>, David Kastrup wrote:
> "David E. Konerding" <dakone@uclink.berkeley.edu> writes:
> 
>> In article <x5u1o243mw.fsf@tupik.goethe.zz>, David Kastrup wrote:
>> > fammacd=!SPAM^nothanks@garden.net (George Macdonald) writes:
>> > 
>> >> On Sun, 16 Jun 2002 09:30:49 GMT, "Robert Myers" <rmyers1400@attbi.com>
>> >> wrote:
>> >> 
>> >> >
>> >> >Without SSE2, which requires that loops be vectorized, a 1.7GHz P2
>> >> >is a very weak foating point performer, as many have noted, and as
>> >> >you have confirmed for yourself.  If I take naive code compiled
>> >> >with icc, my overclocked Celeron running at 1.5MHz will beat a
>> >> >1.7GHz P4 every time.
>> >> 
>> >> Are you sure about this?  I thought the idea with P4's SSE2 was that
>> >> for scalar calcs you have addressable registers (no stack) and
>> >> therefore no need of the FXCH instructions for stack swaps and it
>> >> runs faster than the old x87 FPU.  I've no experience yet but that's
>> >> how I read things.
>> > 
>> > The way "how [you] read things" can be improved upon.  For an
>> > example, tell us how you read the first two words of the paragraph
>> > you quoted above.
>> 
>> You can't just take the first two words of the quoted paragraph, because
>> the sentence itself is factually incorrect:
>> 
>> "Without SSE2, which requires that loops be vectorized..."
>> 
>> SSE2 can be used as a scalar unit, or as a vector unit.  There is some
>> question of whether or not it's a win when used as a scalar unit--
>> although George does give a suggestion why it could be.
> 
> Bad suggestion since in today's architectures register renaming and
> queuing makes FXCH practically a 0-cycle operation.
> 

Yeesh, who pulled your string today?  I only responded the way I did because you
took somebody to task for not reading, but the thing they supposedly didn't
read was wrong anyway.  I never made a value judgement of George's suggestion
but I don't buy your explanation.  I don't know the actual hardware cost of an FXCH
but even with register renaming and "queuing" I suspect it is not "practically 0-cycle
operating" (whatever that means).

I personally haven't yet found SSE2 to be an improvement over standard FP when used
as a scalar unit (nor do I care to give up extended precision).  As a vector unit, however,
I see a 10-fold improvement for performing reciprocal square root operations on arrays; this
isn't a big surprise.

Dave