🚀 go-pugleaf

In article <Cz0or8.K9t@info.swan.ac.uk> iialan@iifeak.swan.ac.uk writes:
<In article <39mmrb$rdr@bmerhc5e.bnr.ca> mlord@bnr.ca (Mark Lord) writes:
<>On my own system, my MC2112A (1Gig) IDE gives blindingly fast read performance
<>with settings up to 32, and then tapering off somewhat at higher settings,
<>probably because the transfer of a "block" cannot begin until all of the 
<>requested sectors of the block have been read (since PIO transfers are "blind"
<>in mode0).  Thus with larger block sizes, there will be increased latencies,
<>especially when a block spans more than one cylinder.
<
<Does this also imply that a system of writing large block mode and reading
<smaller block mode is better than a single setting to use for both ? Also on

Yup.  Unfortunately, the ATA standard for drives supports only a single setting
at a time, applied to both reading & writing.  To change it on the fly incurs
too much overhead to be worthwhile.  I've though about the same thing myself.

<drives supporting it would switching to DMA mode if the run queue is very full
<get a useful trade off on disk performance for cpu availability and get more 
<done overall ?

Yup.  Once DMA-capable interfaces become more common (still pretty rare),
this will likely become a viable alternative.  For that matter, Mode3 DMA
oughta out-perform Mode3 PIO mode on just about every drive anyways.
-- 
mlord@bnr.ca	Mark Lord	BNR Ottawa,Canada	613-763-7482