🚀 go-pugleaf

In article <CAs9Hv.4u0@watserv2.uwaterloo.ca> praetzel@maxwell.uwaterloo.ca (Eric Praetzel) writes:
>In article <1993Jul26.023904.52079@kuhub.cc.ukans.edu> rsl11@kuhub.cc.ukans.edu writes:
>>        I have posted a message in the news that I needed some information
>>on detecting bad memory chips..In case you can be of any help please let me
>>know...Is there any public domain software available on that? Any software
>>that Ican buy?

> QAPlus has a memory test routine.
> However, most computers do a thorough (but it can be bypassed) memory
> test when they are first turned on (or hard reset).  But that does not
> mean that it will detect memory problems.  I have worked with several
> computers that had flaky memory chips and they would crash at least
> every hour (or when-ever I used Windoze).  The memory test _never_
> failed.

Hm - that first sentence says it will do a thorough memory test.  The
second sentence says that it will not detect memory problems.

In truth - the power on memory test really only checks if there is a
chip in the socket :-(

At least I have found that to be the case.

I saw a problem where a program contniually dumped core when running.

This was after a memory upgrade.

I did a strings on the core dump and found that while some of the text
was readable, other characters just weren't right.   I started to look
to see if there was a pattern.  And voila!    All the printable
characters that were wrong, were 1 position higher in the ascii table
than they should have been.  And then I discovered that it was only the
characters that used an even number ascii code.

That pointed to a chip with the least significant bit stuck on.

So out comes the board.  It logically had to be one of the four corner
chips in the newest bank. (without board schematics I didn't know how
it would be laid out - but one of those had to be the LSB chip).

Looked at the four chips, and one of them, which came from the same
tube of chips, was a 64k chip, while all others were 256k.  

POST memory tests really test for only the worst case - and quite often
only show problems when the end of probed memory differs from that in
CMOS.

-- 
Bill Vermillion - bill@bilver.uucp  OR  bill@bilver.oau.org