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Article #4874

Re: DMA questions.

#4874
From: William C. Marsh
Date: Mon, 25 Feb 1991 20:50
26 lines
1874 bytes
In article <27c52136@ralf> Ralf.Brown@B.GP.CS.CMU.EDU writes:
>In article <8bl2yqS00WB401Skhj@andrew.cmu.edu>, Peter John Skelly <ps2x+@andrew.cmu.edu> wrote:
>}Does anyone know if it is possible to program the dma chip used in pc's to
>}do memory to memory copies.

>My understanding is that memory-memory DMA is only possible using channels 0
>and 1, and channel 0 is used for DRAM refresh.	That would make things rather
>tricky even if possible at all.

Unless you need the CPU for something else (Or if you are on a PC rather than
an AT), it is much faster to do memory-to-memory copies with a repeated movsb
(or movsw) command.  The DMA controllers clocks are only at about 400 Khz, so
that limits the speed of DMA transfers.  And, each memory-to-memory transfer
will take two DMA cycles, further diminishing speed.

As an aside, that's why the AT doesn't use DMA for the hard disk access, they
use a repeated input instruction.  The newer bus-master interfaces, (i.e. the
adaptec SCSI board), has it's own DMA controller built onto the board, and it
is capable of a lot faster DMA that what is present on the motherboard.

Bill
-- 
Bill Marsh, Naval Ocean Systems Center, San Diego, CA
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From: bmarsh@cod.NOSC.MIL (William C. Marsh)
Newsgroups: comp.os.msdos.programmer
Subject: Re: DMA questions.
Message-ID: <2866@cod.NOSC.MIL>
Date: 25 Feb 91 20:50:29 GMT
References: <27c52136@ralf>
Organization: Naval Ocean Systems Center, San Diego
Lines: 26