🚀 go-pugleaf

In article 1625@jet.uk, kr@jet.uk (Kenneth Reed) writes:
>A number of code fragments I've seen for programming the interrupt
>controller always follow the access to the port with a short delay
>(usually 2 "jmp $+2"s).

Many microprocessor support devices haven't changed much since the days of
1 MHz 8080's, and the internal registers can require several bus cycles to
complete some state changes. Even 8086's can hit them too fast with inline
code, so it's standard practice to add a few NOPs.

This is something I (and no doubt many others) learned the hard way long
ago, and it's become standard practice.

>This seems a bit arbitrary to me as the delays will have very
>different values when running on a 486 and an 8086 and I was wondering
>exactly what delay is actually required.

It's not the time that matters, but the number of bus cycles; PCs
generally run at the same bus clock (8 MHz) regardless of CPU.

>I tried programming the PIC on my 386 without any delays at all and it
>all worked fine so, perhaps, this is something required only on
>"older" PCs.

They may or may not be needed on a given system. If you're writing something
for yourself only, feel free to leave them out if it seems to work. If you're
doing it for anyone else, it seems a lot safer just to put them in and never
wonder if *that* might be why strange things happen on a full moon...
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"How am I typing? Call 1-818-354-7782"               jack@robotics.jpl.nasa.gov
Jack Morrison/Jet Propulsion Lab/MS107-102 4800 Oak Grove Dr, Pasadena CA 91109