Article View: comp.os.msdos.programmer
Article #763Re: 386 SX Bug
From: Ralf Brown
Date: Thu, 16 Apr 1992 03:11
Date: Thu, 16 Apr 1992 03:11
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In article <3544@cruzio.santa-cruz.ca.us> aki@cruzio.santa-cruz.ca.us writes:
}I was going through some of my old files and just happened to find a file
}describing a bug with the 386SX. This particular problem is _not_ documented
}in any publication I could get my hands on, so if there is anyone out there
}keeping track of Intel's bugs... (BTW, it was a pain to ID this problem,
}since all the debuggers would execute the command correctly. I imagine
}trapped execution mode prevents the problem). Description follows:
It's a bug in the code, not in the processor. In order to guarantee that
self-modifying code will work, you must either flush the prefetch queue
with a branch instruction (JMP, CALL, RET, taken conditional, etc) or locate
the modifying instruction further from the modified instruction than the
size of the prefetch--ranging from 4 bytes on an 8088, 6 on an 8086, to
12 bytes on a 386 and as much as 32 bytes on a 486.
Your code doesn't work when run full-speed because the processor has already
fetched the CALL instruction at the time it is modified. It works when
single-stepped because the interrupt called after each instruction when
single-stepping flushed the prefetch queue.
--
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Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!uwm.edu!psuvax1!rutgers!rochester!cantaloupe.srv.cs.cmu.edu!ralf From: ralf+@cs.cmu.edu (Ralf Brown) Newsgroups: comp.os.msdos.programmer Subject: Re: 386 SX Bug Keywords: 386SX, BUG, INTEL Message-ID: <1992Apr16.031128.290022@cs.cmu.edu> Date: 16 Apr 92 03:11:28 GMT References: <3544@cruzio.santa-cruz.ca.us> Organization: School of Computer Science, Carnegie Mellon Lines: 24 Nntp-Posting-Host: b.gp.cs.cmu.edu