Article View: comp.robotics
Article #1501HC16 primer Rev 0.2
From: Alan Kilian
Date: Wed, 16 Dec 1992 21:07
Date: Wed, 16 Dec 1992 21:07
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10021 bytes
Here's my attempt at a Motorola MC68HC16 primer.
More versions will be posted as I get time to fill things out.
If you can fill out a section please Email it to me.
This is Revision 0.2
0) Revision information:
0.1: Initial writing. Sections 1,2 and 3
0.2: Added section 0,5,6,7 and 8 and the reading list
1) What are the part numbers and variants?
XC16Z1CFC16 16.78 mHz 132 pin plastic surface mount 32 per tray.
SPAKXC16Z1CFC16 16.78 mHz 132 pin plastic surface mount 2 per tray.
XC16Z1CFC20 20.00 mHz 132 pin plastic surface mount 32 per tray.
SPAKXC16Z1CFC20 20.00 mHz 132 pin plastic surface mount 2 per tray.
XC16Z1CFC25 25.00 mHz 132 pin plastic surface mount 32 per tray.
SPAKXC16Z1CFC25 25.00 mHz 132 pin plastic surface mount 2 per tray.
XC16Z1CFD16 16.78 mHz 132 pin molded carrier ring 10 per tube.
XC16Z1CFD20 20.00 mHz 132 pin molded carrier ring 10 per tube.
XC16Z1CFD25 25.00 mHz 132 pin molded carrier ring 10 per tube.
XC16Z1CFV16 16.78 mHz 144 pin plastic surface mount 44 per tray.
SPAKXC16Z1CFV16 16.78 mHz 144 pin plastic surface mount 2 per tray.
XC16Z1CFV20 20.00 mHz 144 pin plastic surface mount 44 per tray.
SPAKXC16Z1CFV20 20.00 mHz 144 pin plastic surface mount 2 per tray.
XC16Z1CFV25 25.00 mHz 144 pin plastic surface mount 44 per tray.
SPAKXC16Z1CFV25 25.00 mHz 144 pin plastic surface mount 2 per tray.
XC16Z1CFM16 16.78 mHz 144 pin molded carrier ring 13 per tube.
XC16Z1CFM20 20.00 mHz 144 pin molded carrier ring 13 per tube.
XC16Z1CFM25 25.00 mHz 144 pin molded carrier ring 13 per tube.
The XC means that it is still in the eXperimental production run.
They still have some strange actions that will not be in the production
parts. From the errata sheets I have there aren't any show stoppers.
One XC16Z1CFC16 will run about $22.00 and take 16 weeks to get to you.
Although I don't believe the 16 week lead time.
2) What is it?
The MC68HC16Z1 is a high-speed 16-bit control unit that is upwardly code
compatible with MC68HC11 controllers.
M68HC16 controllers are built up from standard modules that interface
through a common internal bus.
The 'HC16Z1 incorporates the following modules:
a true 16-bit CPU (CPU16),
a system integration module (SIM),
an 8/10-bit analog-to-digital convertor (ADC),
a queued serial module (QSM),
a general purpose timer (GPT),
and a 1024 byte standby ram (SRAM).
These modules are interconnected by the intermodule bus (IMB).
3) Features:
CPU16:
16-bit architecture
Full set of 16-bit instructions
Three 16-bit index registers
Two 16-bit accumulators
Control-oriented digital signal processing capability
1 Megabyte of program memory and 1 Megabyte of data memory
This means you have 20 bits of effective address which
consists of a 16 bit page address and a 4 bit extension.
High-level language support
Like what?
Fast interrupt response time
Somewhere around 25 clocks. (1.5 microseconds @16.78 mHz)
I can't get the numbers exactly from the million pages of manuals.
Background debugging mode
Wow! This is cool. More later.
Fully static operation.
This means you can use whatever clock you like. All the way
down to zero. And you can vary the clock during execution.
SIM:
External bus support.
What a surprise
Programmable chip select outputs.
Cool way to map external devices into your data space.
System protection logic
Who knows what this is.
Watchdog timer, Clock monitor and bus monitor.
I never use these types of things.
Two 8-bit dual function ports.
One 7-bit dual function port.
Phase-Locked-Loop (PLL) Clock system.
You don't need a 16.78 mHz crystal. Just use a 32,768 Hz crystal.
(Yup, 32.768 kHz. Apparently its a watch crystal.)
8/10-bit A/D:
Select 8 or 10 bit precision.
Eight channels, Eight result registers.
The HC11 has 4 result registers.
Eight automated modes.
One bit for each of three modes:
SCAN: continuous or single conversion
MULT: Multiple or single channel
S8CM: 8-conversions or 4-conversions
You can set as many bits as you like. 2^3 = 8 modes.
Three result alignment modes
Unsigned Right-justified format
Unsigned Left-justified format
Signed Left-justified format
One 8-bit digital input port.
If you don't use it as an analog input port.
QSM:
Queued serial peripheral interface
Like the HC11's SPI but has a 32 byte input and output queue
so you don't have to fiddle with each byte.
One 8-bit Dual function port
If you don't use it as a serial port.
GPT:
Two 16-bit free-running counters with prescaler
Three input capture channels
Four output compare channels
One input capture/output compare channel
One pulse accumulator channel
Two pulse width modulation outputs (PWM)
One 8-bit Dual function port
Two optional discrete inputs
Optional external clock input.
SRAM:
1024 byte static ram
And its only 2 clocks away!!!
External standby voltage supply input
For a lithium battery or Whopping-big capacitor.
4) How does it compare to the HC11?
5) How does the Background Debugging Mode (BDM) work?
This is great. It's my favorite feature so far. Here's what it does:
It does three things: Deterministic opcode tracking, breakpoint exceptions
and background debugging.
1) Deterministic opcode tracking:
The CPU16 has two multiplexed outputs, IPIPE0 and IPIPE1 that enable
external hardware to monitor the instruction pipeline during normal
program execution. The signals can be demultiplexed into six
pipeline state signals that allow a state analyzer to synchronize with
instruction stream activity. You are now wondering how we get 6 states
out of two signals aren't you? Well they are time multiplexed.
The states are as follows:
Phase IPIPE1 IPIPE0 State signal name
1 0 0 Start & Fetch
1 0 1 Fetch
1 1 0 Start
1 1 1 NULL
2 0 0 Invalid
2 0 1 Advance
2 1 0 Exception
2 1 1 NULL
2) Breakpoint exceptions:
Breakpoints are set by internal assertion of the IMB *BKPNT signal
or assertion of the *BKPNT pin. The CPU16 supports breakpoints on
any memory access. So you can design a state analyzer that watches
for opcodes or addresses and asserts the *BKPNT signal.
3) Background debugging mode (BDM):
There are three lines DSCLCK, DSO and DSI
DSCLCK - Development Serial CLoCK
DSO - Development Serial Output
DSI - Development Serial Input
These three lines implement a cool little synchronous serial interface.
You send serial commands and data to the CPU16 while it sends you
serial status and data.
The commands are:
- Read Registers from mask Read CPU16 registers
- Write Registers from mask Write CPU16 registers
- Read MAC Registers Read the Multiply and ACcumulate regs
- Write MAC Registers Write the Multiply and ACcumulate regs
- Read PC and SP Read Program Counter and Stack Pointer
- Write PC and SP Write Program Counter and Stack Pointer
- Read Data memory Just what it says
- Write Data memory Just what it says
- Read program memory Just what it says
- Write program memory Just what it says
- Execute from current PK:PC Continue executing
- Null Duh.
So you could boot this thing up with BDM enabled,
download a program into the SRAM and junp to the beginning of the
program. Cool huh?
6) Tell us about the Two 16-bit free-running counters.
One counter is just like the HC11 counter for comapre and capture
functions. The second counter is used for the PWM function.
7) What about power-down modes?
LPSTOP mode:
The CPU16 initiates a stop. Controller modules are deactivated,
The system clock is stopped. The processor waits until an interrupt of
the proper pripority is asserted and then everything is started up.
WAI mode:
The CPU16 is stopped but other modules continue to run. The timer
subsystem can wake up the CPU16 for example.
Current usage:
Run mode 110 milliAmps MAX
WAI 5 milliAmps MAX
LPSTOP 350 microAmps MAX
8) How do those PWM outputs work?
You select a frequency from 32.8 kHz to 4.0 Hz and them you can select
the duty cycle from 0 to 100% by writing an 8-bit register.
There are two separate PEM outputs and two 8-bit registers for the duty
cycle. They share the same frequency register.
Reading list: These are required reading if you want to work with this thing.
CPU16RM/AD Revision 1 The 16 bit CPU module
MC68HC16Z1 Users manual
ADCRM/AD Analog to digital input module
GPTRM/AD The General purpose timer module
QSMRM/AD Queued serial module
MC68331UM/AD The 68HC331 manual for SIM and SRAM information
MC68HC16Z1TS/D Revision 3 The 'Z1 technical summary
PC68HC16Z1 Errata sheet
SIMRM/AD (Not available yet) The System Integration Module
You can get these from the Motorola literature distribution:
1-602-994-6561
-Alan Kilian
--
-Alan Kilian kilian@cray.com 612.683.5499 (Work) 612.721.3990 (Home)
"Our friend Dirac has his own philosophy. It is:"
"There is no God and Dirac is His prophet" - Some Physicist
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Newsgroups: comp.robotics,sci.electronics Path: arc1-ca.pugleaf.net!sparky!uunet!timbuk.cray.com!hemlock.cray.com!kilian From: kilian@cray.com (Alan Kilian) Subject: HC16 primer Rev 0.2 Message-ID: <1992Dec16.150732.11100@hemlock.cray.com> Lines: 230 Nntp-Posting-Host: gopher Organization: Cray Research, Inc. Date: 16 Dec 92 15:07:32 CST