🚀 go-pugleaf

rg9538@ehsn8.cen.uiuc.edu (Ronald E Garnett) asks:
> Does anyone out there in net land know how many SLAVE units that the 68HC11
> EVBU board can drive from a master.

The synchronous connections are generally daisy chained so that each CPUs
output only drives one other CPUs input. This way you can connect an infinite
number of CPUs together. Like this:

   CPU A                  CPU B           CPU C
+-----------+          +----------+     +-----------+
|    MOSI   +---->-----+ MOSI MISO+-->--+ MOSI MISO +-->--+
|    MISO   +--<-+     |          |     |           |     |
+-----------+    |     +----------+     +-----------+     |
                 +----------------------------------------+
Now believe it or not this diagram is correct.
CPU A is the master. CPUs B&C are slaves.

MOSI means Master Out Slave In
MISO means Master In Slave Out

So it looks like this:
   CPU A                  CPU B           CPU C
+-----------+          +----------+     +-----------+
|        MO +---->-----+ SI     SO+-->--+ SI     SO +-->--+
|        MI +--<-+     |          |     |           |     |
+-----------+    |     +----------+     +-----------+     |
                 +----------------------------------------+
Where MO and MI mean Master Out and Master In
and   SO and SI mean Slave Out and Slave In.

Oh, the SCK (Serial ClocK) lines get connected together on all CPUs.
This will be s clock output on the master and a clock input on all of the
slaves. You don't want two masters for obvious reasons.

If you REALLY want to have one CPU drive two other CPUs inputs it will
probably be O.K. These things have CMOS inputs so it doesn't take too much
current to get them to switch. This and the fact that the SPI does not
switch THAT fast means that one CMOS output can drive several CMOS inputs
just fine. I'd say ten would be O.K. The problem with this version is
that it is only a one-way connection. You cannot connect the ten other CPU's
output lines back to the one CPU's input line. That would be bad news.

The asynchronous (SCI) channel should be able to drive several other CPUs
inputs the same as the synchronous (SPI) channel can. You have the same 
problem with it being a one-way connection. You cannot connect several
CPU's Transmit lines to one CPU's recieve line.
-- 
 -Alan Kilian           kilian@cray.com 612.683.5499 (Work) 612.721.3990 (Home)
  Cray Research, Inc.   655 F Lone Oak Drive, Eagan  MN, 55121 
                        "It's based on actual math". -Dilbert