🚀 go-pugleaf

In article <1440@jimi.cs.unlv.edu> jack@jimi.cs.unlv.edu (Jack Alexander) writes:
>I have a need for a make-type program that will allow recompilations
>to be dependent on the changing of compiler definitions (i.e., "-DVERSIONB")
>                                                         ....when I change
>a compile variable, I don't want to re-compile every file (some directories may
>have 50 source files each), just the ones that actually reference the variable.

How about this solution, using ordinary make.  You write a shell script
which does an fgrep on the .c (and/or .h) files, searching for the
definition in question -- e.g., "VERSIONB" -- then "touch"es each file
in which it is found.  You have a special target in the make file which
you invoke whenever you want to recompile everything that depends on this.
This target first runs the script, then "make"s the program target.

There are complications, but something like this ought to be doable; at worst,
you'd need a separate target for each -D you expect to invoke from the
commandline.  For example, you could have target "VERSIONB:".  Then, if you
said "make -DVERSIONB VERSIONB" the VERSIONB: target would first do the
fgrep on VERSIONB & touch, then make the program.  You could even define
a csh "alias makeD make -D\!* \!*" which would work, provided you only gave
it a single -D.  More elegant solutions would be necessary if you wanted
to either use more than one -D at once or else have a single target that
would work no matter what the -D, but you get the idea....

	-P.


	-P.

************************f*u*cn*rd*ths*u*cn*gt*a*gd*jb**************************
Peter S. Shenkin, Department of Chemistry, Barnard College, New York, NY  10027
(212)854-1418  shenkin@cunixc.cc.columbia.edu(Internet)  shenkin@cunixc(Bitnet)