🚀 go-pugleaf

In article <41g24f$rf9@newsbf02.news.aol.com>, ffarance@aol.com (FFarance) writes
: ....
: Yes, this is true.  In fact Martin Kealey pointed out that the number
: of operations you need for some hardware (adds and carries) is
: proportional to about (N+1)*N/2 instructions, where N is the number of
: segments.  Making 128-bit arithmetic out of 32-bit segments is too
: bad, but making 1024-bit arithmetic out of 8-bit segments would be
: a pain (assuming no hardware support for extended arithmetic).  I'll
: raise this as an open issue in the SBEIR paper.

For machines with no add/subtract with carrie?  For thoze that hav it,
the cost is linear in the length of the numeral:
	add y,x
	adc y+4,x+4
	adc y+8,x+8
	adc y+12,x+12
for 128-bit integer out of 32-bit parts, stord from low to high.  This is
found in the Intel chips, the VAX, Motorola chips, and doubtless more.  The
instructions found in the PDP-11 are not enough to make this this simple.