Re: ARM risc speed?

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#728

From: Simon Burrows
Date: Thu, 21 Jan 1993 11:40

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In article <1993Jan20.163935.29452@dcs.warwick.ac.uk> thughes@dcs.warwick.ac.uk (Tom Hughes) writes:
>Acorn and ArmLtd have been saying for some time now that the NV
>condition code should not be used for NOP's. The recommended NOP is
>MOV R0,R0. The reason for this is that the instruction space used by
>the NV code may be reallocated in future processors, as NV is
>basically pointless.

A while ago Acorn sent out some guidelines on code sequences which should
no longer be used if compatibility with future processors is to be maximised.
They were issued before the ARM250 was brought out, so probably apply to that?
The problem is that such things are only deemed to be of interest to
registered developers!

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<3hV8jQj027n@khantazi.welly.gen.nz> <1993Jan20.151326.23097@infodev.cam.ac.uk> <1993Jan20.163935.29452@dcs.warwick.ac.uk>

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Path: arc1-ca.pugleaf.net!sparky!uunet!spool.mu.edu!agate!doc.ic.ac.uk!warwick!nott-cs!smb
From: smb@cs.nott.ac.uk (Simon Burrows)
Subject: Re: ARM risc speed?
Message-ID: <1993Jan21.114022.5930@cs.nott.ac.uk>
Organization: Nottingham University
References: <3hV8jQj027n@khantazi.welly.gen.nz> <1993Jan20.151326.23097@infodev.cam.ac.uk> <1993Jan20.163935.29452@dcs.warwick.ac.uk>
Date: Thu, 21 Jan 93 11:40:22 GMT
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