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Article #752

RISC OS 3 Self-test result codes

#752
From: Mike
Date: Sun, 24 Jan 1993 11:37
52 lines
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For all those people out there who have been unlucky enough to
experience problems when upgrading DIY-style from RO2 to RO3, here
is a breakdown of the self-test sequence.

The purple screen at power on indicates that the self-test has
begun.  A brief ROM, RAM, VIDC and IOC test is performed and then
the screen colour changes to blue and a full memory test is
performed, along with a second test of the VIDC and IOC.  When the
screen returns to purple, the machine is testing for an ARM3.  At
the end of this sequence the screen colour is set to green (for
pass) or red (for fail).  If the tests have all passed then the
machine starts to boot and the RISC OS 3 welcome screen is displayed.

If any test fails, the screen will remain red and the disc drive
light will blink a fault code.  A short flash is used to indicate a
binary '0' and a long flash indicates a binary '1'.  The bits are
grouped into eight nybbles (blocks of four bits) with the most
significant bit first.

The lowest seven bits are a status word.  The meaning of each bit is
given below in hex :-

00000001   Self-test due to power on
00000002   Self-test due to interface hardware
00000004   Self-test due to test link
00000008   Long memory test performed
00000010   ARM 3 fitted
00000020   Long memory test disabled
00000040   PC-style IO world detected

Bits 8-31 indicate the fault code and are described below.  Not all
the bits are used.

00000200   ROM failed checksum test
00000400   MEMC CAM mapping failed
00000800   MEMC protection failed
00004000   VIDC Virq (video interrupt) timing failed
00008000   VIDC Sirq (sound interrupt) timing failed
00020000   RAM control line failure
00040000   Long RAM test failure

Hope this helps all those with problems.

Good luck!

-- 
Mike Ellis, Darwin College, The University, Canterbury, Kent, England, CT2 7NY.

    ********* Views expressed are my own and in no way represent *********
    *********     the views of any past or present employers.    *********
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From: mre@ukc.ac.uk (Mike)
Newsgroups: comp.sys.acorn.tech
Subject: RISC OS 3 Self-test result codes
Message-ID: <1024@rook.ukc.ac.uk>
Date: 24 Jan 93 11:37:11 GMT
Organization: Computing Lab, University of Kent at Canterbury, UK.
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