Article View: comp.sys.amiga.tech
Article #12749Blitter Operation (was:Virtual Memory/doable1.4 request/Hotlinks)
From: Rob Peck
Date: Thu, 18 May 1989 19:44
Date: Thu, 18 May 1989 19:44
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> In article <4182@tekig5.PEN.TEK.COM> wayneck@tekig5.PEN.TEK.COM (Wayne Knapp) writes: > 2. Blitter only accesses 1 out 2 memory cycles at best and it > isn't real time anyway. As I remember it, the blitter is quite capable of using EVERY cycle. It only takes a back seat if it senses that some other DMA is pending. The 68000 gets locked out of most cycles when the blitter is running, though the blitter "stutter-stops" to give the 68000 occasional access, then immediately grabs the bus again after single cycles are granted. Display DMA takes precedence over the blitter automatically to assure that a stable display is shown. Tom Rokiki (BlitLab author and known blitter expert could confirm this.) Rob Peck
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!lll-winken!ubvax!ardent!rap!rap From: rap@rap.ardent.com (Rob Peck) Newsgroups: comp.sys.amiga.tech Subject: Blitter Operation (was:Virtual Memory/doable1.4 request/Hotlinks) Message-ID: <6542@ardent.UUCP> Date: 18 May 89 19:44:37 GMT References: <8905132203.AA27784@postgres.Berkeley.EDU> <17209@usc.edu> <24470@agate.BERKELEY.EDU> <4193@tekig5.PEN.TEK.COM> Sender: news@ardent.UUCP Reply-To: rap@rap.ardent.com (Rob Peck) Organization: Ardent Computer Corp., Sunnyvale, CA Lines: 16