Article View: comp.sys.amiga.tech
Article #14149Re: 32 bit RAM
From: Dolf Grunbauer
Date: Fri, 09 Mar 1990 15:03
Date: Fri, 09 Mar 1990 15:03
43 lines
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2871 bytes
In article <8720@netcom.UUCP> hue@netcom.UUCP (Jonathan Hue) writes:
>In article <1778@crash.cts.com> hawk@pnet01.cts.com (John Anderson) writes:
>>I thought each instruction was 32 bits in length and needed to be stored at
>>two 16 bit addresses so when it was used in 32 bit RAM it took up 32 bits for
>>that same one instruction. Am I right so far in saying the first is right and
>>the second (what I used to think) is wrong?
>
>They're both wrong. 68k instructions can be 1, 2, or 3 16-bit words long,
>although I'm pretty sure that only the 68020 and 68030 support the 3
>word long ones (CAS2 and LINK (long) come to mind).
Hmm I think this is not quite correct. The instruction word is always one
16-bit word. If necessary there are extra extension words, e.g. to hold
some immediate data or address etc. For example:
JSR (a0) will translate to: 4E90
JSR 0x12345678 will translate to: 4EB9 1234 5678
The longest possible instruction on a MC68000/MC68008/MC68010/MC68070 is:
MOVE.L #0x12345678,0x9ABCDEF0 which translates to: 23FC 1234 5678 9ABC DEF0
The longest possible instruction on a MC68020/MC68030/MC68040 is:
MOVE.L ([0x11111111,A0,D0.L*8],0x22222222), ([0x33333333,A1,D1.L*8],0x44444444)
which translates to: 21B1 0F23 1111 1111 2222 2222 1F23 3333 3333 4444 4444
Note that the very short: MOVE.L A0,D0 just translates to: 2010
When a co-processor is involved (e.g. MC68881/MC68882), the actual instruction
length depends on the co-processor, but is limited to 256 (extionsion) bytes,
giving a total of 129 words. The instruction word indicates that the
instruction is actually for the co-processor, the next word is the co-processor
instruction and then there may be at most 254 extension bytes for the co-pro.
The actual limit for a MC68881 is I think 8 words:
FMOVE.X #0x123456789ABCDEF012345678,FP0
which translates to: F23E 4800 1234 5678 9ABC DEF0 1234 5678
Disclaimer: I hope the hexnumbers of the assembler translations are correct,
I did not do a compiler check, but tried to reproduce the
MC68030 and MC68881 User's Manual.
--
Dolf Grunbauer Tel: +31 55 433233 Internet dolf@idca.tds.philips.nl
Philips Telecommunication and Data Systems UUCP ....!mcvax!philapd!dolf
Dept. SSP, P.O. Box 245, 7300 AE Apeldoorn, The Netherlands n n n
It's a pity my .signature is too small to show you my solution of a + b = c
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!mcsun!hp4nl!philapd!ssp11!dolf From: dolf@idca.tds.PHILIPS.nl (Dolf Grunbauer) Newsgroups: comp.sys.amiga.tech Subject: Re: 32 bit RAM Message-ID: <676@ssp11.idca.tds.philips.nl> Date: 9 Mar 90 15:03:39 GMT References: <1778@crash.cts.com> <8720@netcom.UUCP> Organization: Philips Information Systems, Apeldoorn, The Netherlands Lines: 43