🚀 go-pugleaf

I know this has been discussed alot already, but its still not completely
clear to me.  I would appreciate any information regarding this subject.

The story goes, DMA is faster.  But, as many people point out, it sometimes
is slower than non-DMA, when there is contention for the bus.  Case in point
is the hi-res interlace screen situation where co-processors and your DMA
hard disk device are contending for cycles on the coprocessor bus.

Then someone says a 'proper' DMA device is faster, than non-DMA, even for the
situation above.  How is this so?  What is a 'proper' DMA device?

The current solution, for DMA controlers with slow loads during the above
situation, from my understanding, is to limit the DMA transfer to small
block sized transfers.  It seems that this is basicaly just like a non-DMA
transfer.

What about other solutions?  Like dynamicaly allocating DMA transfer sizes
based on device priority, and contention, ect.  Isn't that what Bus Mastering
is all about?

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|Dennis Gorrie                 'Chain-Saw Tag...                        |
|GORRIEDE AT UREGINA1.BITNET                    Try It, You'll Like It!'|
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