🚀 go-pugleaf

In article <4093@crash.cts.com>, hawk@pnet01.cts.com (John Anderson) writes:
>    I've been following the discussions (or lack there of) on hacking the 2000
> a bit to get the 2 meg agnus to work in it.  Cost is of no importance so even
> if the PLCC (or something like that) piggy back sockets are $120 each, that
> doesn't matter.  Dave Haynie, if you have any info that I might need then
> please let me know.  I have the schematics of the 2000 and the 1 meg agnus in
> my B2000.  If I can get a copy of the 3000 schematics, will that be enough
> info to convert the pins from the 1 meg agnus to the way they are supposed to
> be on the 2 meg version?  A quick question (or two): are there the same number
> of pins on the 1 meg agnus that are on the 2 meg agnus, and if yes then: what
> happens to the lines that are converted?  If anybody else has any information
> that can be of help then please let me know.  Thanks ahead of time.

I don't have detailed information, but I've picked up some general info.
RAS1* no longer exists. A "MA9" (or something like that) has been
added. In other words, the "natural" configuration for the 2MB Agnus is
a single bank of 1M by 1 DRAMs (the 3000 has extra logic to control its
two banks -- needed to get 32 bits out at a time). Also, another address
line is conected (A20). That presents a problem: one more pin is used
than with the 1MB Agnus. As a person who knows nothing about chip design,
I'd say they should have ditched one of those redundant power/ground
lines, but I guess their layout requires those. To get the extra pin
(2 actually; I guess one is unused) they ditched the XCLK logic used
by Genlocks (specifically, XCLK and XCLKEN*). It's implemented by some
rather trivial external logic on the 3000 (and of course the 1000 as well).

Hope this helps a little...

-- Dan Babcock
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