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Article #6470

Re: Static vs. static column vs. dynamic vs. ???

#6470
From: Kevin Darling
Date: Fri, 09 Nov 1990 07:55
48 lines
2868 bytes
Don asks  (and durn it, I wrote up a long, detailed message about this
with full specs on CIS a while back, but I cannot find it on disk now):

> What is static column RAM?

Ok. Simplified, dynamic RAM is divided into "rows" and "columns" (a matrix),
as I'm sure you've read by now.  A 1-meg chip is 1024 rows by 1024 columns.

To access a bit, you normally give the ram chip the row address first,
and then the column address, via the same shared address input pins.
And so that the chip knows which is which (row vs column), you also use two
extra pins... Row Address Strobe (RAS) and Column Address Strobe (CAS).

 Address:   row  col     row  col     (two memory accesses)
 RAS*     ---__________---__________   normal dram mode
 CAS*     --------_____--------_____
 Data               xxx          xxx

DRAM access timing is composed of many specs, but one main delay is in
how quickly RAS can be strobed up and down (again, simplified).  So ram
makers came up with an enhancment often called "page mode", where RAS
can stay low while just CAS strobes (obviously this only works as long
as the "row address" doesn't change!)... which speeds things up:

 Address:   row  col     col     (two memory accesses)
 RAS*     ---__________________   page mode
 CAS*     --------_____---_____
 Data               xxx     xxx

And we also have Static Column mode, which allows the column address to
change w/o CAS*, yet the data output follows correctly (like "static" ram):

 Address:   row  col    col     (two memory accesses)
 RAS*     ---_________________   static column mode
 CAS*     --------____________
 Data               xxx    xxx

The A3K can use either paged or column.  But while Static Column can be a
tiny bit faster, my home timing analysis indicated that it wouldn't make
any diff which one you used on the 3000.  I've heard otherwise, so I'd
be interested to know, from the good CBM folk, what the real deal is. Thx!

PS: there are lots of kinds of VRAMs. Basically, they take advantage of
video data always coming out in sequential order, and have other neat tricks.

 Kevin Darling - "This is your  |  CIS: 76703,4227     Delphi:OS9ugpres
 brain. This is your brain on   | Inet: 76703.4227@compuserve.com (best)
 non-Motorola cpus. Got it?" ;-)|   or: kdarling@hobbes.ncsu.edu
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From: kdarling@hobbes.ncsu.edu (Kevin Darling)
Newsgroups: comp.sys.amiga.tech
Subject: Re: Static vs. static column vs. dynamic vs. ???
Message-ID: <1990Nov9.075535.14012@ncsuvx.ncsu.edu>
Date: 9 Nov 90 07:55:35 GMT
References: <15571@brahms.udel.edu> <1990Nov08.222823.1925@hoss.unl.edu>
Reply-To: kdarling@hobbes.ncsu.edu (Kevin Darling)
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Organization: NCSU Computing Center
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