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Article #67Re: GVP 68030 reviewed in Sentry / 68040
From: Valentin Pepelea
Date: Fri, 16 Jun 1989 04:06
Date: Fri, 16 Jun 1989 04:06
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1528 bytes
Mark Huth <mph@behemoth.phx.mcd.mot.com> writes in
Message-ID: <11088@behemoth.phx.mcd.mot.com>
> Current specs for '040 - released, not internal rumors -
Oh, external rumors?
> 68882 compatible FPU
> Internal Harvard Architecture
How about external architecture? Does it have separate data space and
instruction space buses? I hope not, we're not ready for this.
> On chip PMMU
> Two 4k caches- in physical address space, simultaneously accessible
> Two ATC - simultaneous address translation for data and instructions
> Bus snooping for cache coherency
> '030 object compatible
> Concurrent FPU, IPU, MMU/BIU execution.
>
> Look for it in 25,33,50 and possibly 100 MHz versions.
Prices?
Valentin
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!tut.cis.ohio-state.edu!ucbvax!UOTTAWA.BITNET!451061 From: 451061@UOTTAWA.BITNET (Valentin Pepelea) Newsgroups: comp.sys.amiga.tech Subject: Re: GVP 68030 reviewed in Sentry / 68040 Message-ID: <8906160412.AA09343@jade.berkeley.edu> Date: 16 Jun 89 04:06:04 GMT Sender: daemon@ucbvax.BERKELEY.EDU Lines: 31