🚀 go-pugleaf

Time for the hardware guys to get a question in sideways...

Here's the situation. I am doing this project that might or might not
make my Amiga (B2000) go a lot faster. In reading thru the hardware
Tech manual I came across this ambiguity...

IF you are responding to a VPA* signal because the GARY chip decodes a
periphal address, does this mean that DTACK* is *not* asserted during
this cycle ??? The 68K manual says it's not, but the GARY chip isn't
in the 68K manual.

Ok, now for the even more advanced students, do the 8520's respond to
VMA* by issuing an INT6/2* ? And if so can I assume that Paula will
suck up this interrupt and generate an IPL code that I will have to
feed to my 68020 ??? Can I assert AUTO* right away when I detect an
interrupt ? Or do I have to wait until everybody goes tri-state before
I drop AUTO* ???

Hmm, I wonder how many people are going to figure out what I am tring
to build here? ;-)

All the signals that I am refering to are those seen at the
co-processor card edge.

As always, any help given is appreciated muchly.
---
Steve -Raz- Berry     Disclaimer: It wasn't me! I was volatilizing my esters.
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