🚀 go-pugleaf

In article <119697@sun.Eng.Sun.COM> raz%kilowatt@Sun.COM (Steve -Raz- Berry) writes:
> 
> Here's the situation. I am doing this project that might or might not
> make my Amiga (B2000) go a lot faster. In reading thru the hardware
> Tech manual I came across this ambiguity...
> 
> IF you are responding to a VPA* signal because the GARY chip decodes a
> periphal address, does this mean that DTACK* is *not* asserted during
> this cycle ??? The 68K manual says it's not, but the GARY chip isn't
> in the 68K manual.

DTACK isn't asserted, since it these cyles are self-terminating.

> Ok, now for the even more advanced students, do the 8520's respond to
> VMA* by issuing an INT6/2* ? And if so can I assume that Paula will
> suck up this interrupt and generate an IPL code that I will have to
> feed to my 68020 ??? Can I assert AUTO* right away when I detect an
> interrupt ? Or do I have to wait until everybody goes tri-state before
> I drop AUTO* ???

Huh?  Interrupts are done in a simple, but not obvious way.  The processor
does an ineterrupt acknowledge cycle.  The address lines during this cycle
are clearly defined and based on the IPL being service.  The address selects
ROM.  The vector numbers are read from ROM, not any peripheral device.
Co-processor boards are free to do AVEC type interrupts if they do the
function code decoding, the results are equivalent.  Real vectored
with codes from the devices and whatnot aren't adequeatly supported by
the expansion bus - no priority chains or encoding.

You sound generally confused about 68000 interrupts though.

> Hmm, I wonder how many people are going to figure out what I am tring
> to build here? ;-)

Well, have fun, but beware of reventing the wheel.  There are reasonable
coprocessor solutions out there from hacker kit to high dollar already.

-- 
George Robbins - now working for,	uucp: {uunet|pyramid|rutgers}!cbmvax!grr
but no way officially representing	arpa: cbmvax!grr@uunet.uu.net
Commodore, Engineering Department	fone: 215-431-9255 (only by moonlite)