🚀 go-pugleaf

The point of RISC chips is that they can go faster because they have fewer,
*simpler* instructions.  It's based on the theory that the vast majority
of instructions used (frequency of use in real code) are the simple ones,
but they have to be slowed down and made tricky in order to accomodate the
fancy high-powered instructions which the processors support (store multiple,
move with edit, BCD math, etc...)  By restricting the set of instructions to
only the simple ones, the processor can be clocked much faster (more MIPS).
The complex thingies are then constructed in assembler from the simple
instructions.

Whether this works or not depends on how true it is that your applications
mostly uses the simpler instructions.  If that's true, a RISC MIP is worth
about the same as a non-RISC MIP.  If your application uses lots of the
more complex processor instructions, the RISC MIP is less meaningful, because
you'll need more of them to perform the task at hand.

Really what it comes down to is that you can't meaningfully compare RISC
and non-RISC machines on the basis of MIPs, because the two sorts of MIPs
are totally different.