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The Atari Mega st internal connector.

The signals provided on the 64 pin connector are essentially the
pins of the 68000 processor. The diagram below shows a top view
of the connector with its associated pin numbers and signal 
names. Active low signal are followed by: (L)


              Top view of
              Motherboard
              Connector

                      _
		    _| |
       D4     (1)  |   | (2)  D5
       D3     (3)  |   | (4)  D6
       D2     (5)  |   | (6)  D7
       D1     (7)  |   | (8)  D8
       D0     (9)  |   | (10) D9
       AS (L) (11) |   | (12) D10
      UDS (L) (13) |   | (14) D11
      LDS (L) (15) |   | (16) D12
    R / W (L) (17) |   | (18) D13
    DTACK (L) (19) |   | (20) D14
       BG (L) (21) |   | (22) D15
    BGACK (L) (23) |   | (24) GROUND
       BR (L) (25) |   | (26) A23
   GROUND     (27) |   | (28) A22
      CLK     (29) |   | (30) A21
   GROUND     (31) |   | (32) GROUND
     HALT (L) (33) |   | (34) A20
    RESET (L) (35) |   | (36) A19
      VMA (L) (37) |   | (38) A18
        E     (39) |   | (40) A17
      VPA (L) (41) |   | (42) A16
     BERR (L) (43) |   | (44) A15
      NMI (L) (45) |   | (46) A14
     INT5 (L) (47) |   | (48) A13
     INT3 (L) (49) |   | (50) A12
      FC2     (51) |   | (52) A11
      FC1     (53) |   | (54) A10
      FC0     (55) |   | (56) A9
       A1     (57) |   | (58) A8
       A2     (59) |   | (60) A7
       A3     (61) |   | (62) A6
       A4     (63) |_  | (64) A5
                     |_|

    <- Front of ST



The connector is a TRW no. 009-00005-6, JAE no. ME03-R64P-D4T2-A1
or equivalent.

This information was taken from PRELIMINARY describtion of the Mega ST 
internal bus documentation (September 7. 1987) so it may have changed.

FROM
  Peter Frandsen
  Aalborg University Center
  Denmark