🚀 go-pugleaf

Joern Moe writes
] In the falcon they use sync 
] mode on a 16 bit bus. This gives a 4 clock cycle for each longword
] access to the bus. This implies a 25% reduction in performance, not 50%.

 That is wrong. Synchrone cycles on the 68030 (i.e. those terminated by STERM  
rather than DSACK) must be 32-bit wide. Refer to the 030 User s Manual. There  
is no other way than DSACK to end a 16-bit wide exchange.

Vincent.

--

 In memoria di mori di Furiani.