🚀 go-pugleaf

SLSW2@cc.usu.edu (Roger Ivie) writes:

> Actually, there's another interpretation. Recall that even now MicroVAXes
> don't execute the complete instruction set; the CRC instruction, for instance
> is emulated by software. The hardware simply provides hardware assist to
> emulation routines to execute these instructions.
> 
> A RISCy VAX could imply even more emulation done by software. The core machin
> would execute some small subset of the instruction set (perhaps those that
> can reasonably be done in one cycle) and the remaining instructions would
> be interpreted.

Hmmm.  I don't have it on me at present (it's at work), but my VAX
Architecture Handbook has a whole chapter on subset systems.  It defines
a "core" set of instructions, without which a processor is not a VAX....

It's a fairly large set, just leaving out some of the more estoeric
and/or complex instructions (larger FP modes, character string
instructions, POLYx etc).

Mind you, to make code *really* fly on a VAX, you tend to have to treat
the thing as a RISC anyway -- keep as much as possible in registers, use
single operand instructions when you can't, intersperse memory
instructions with register only ones etc.  I gather the FORTRAN compiler
tends to do this, even though the instrucuction set "seems" optimised
towards FORTRAN.....


Don Stokes, ZL2TNM  /  /                            Home: don@zl2tnm.gp.govt.nz
Systems Programmer /GP/ Government Printing Office  Work:        don@gp.govt.nz
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