Article View: comp.sys.dec
Article #277Re: PDP 11/T55
From: John Holden
Date: Mon, 10 Aug 1992 00:35
Date: Mon, 10 Aug 1992 00:35
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2578 bytes
The PDP 11/45, 11/50 and 11/55 all use the same base PDP 11/45 CPU. The CPU has the two Unibus interfaces (normally jumpered together) and a dual ported memory bus called the the "Fast Bus". The fast bus a one port connected to the CPU and the other connected to a second Unibus (B). A PDP 11/45 has no memory on the fastbus A PDP 11/50 has mos memory on the fastbus A PDP 11/55 has bipolar memory on the fastbus. If DEC upgraded your 11/45 to an 11/55, all they do is add the fasbus memory, more power supply modules (the slots are prewired) and change the perspex front panel. The rest of the memory sits on the unibus and was usually core. The most likely reason that the front panel doesn't work is that the processor is in power fail mode which stops the cpu clock. If you have left the unpowered cabinets still connected to the Unibus, the power fail signals BUS ACLO and BUS DCLO will be asserted by their power supplies (event when unpowered). The quickest test is to get a volt meter and measure the signals on the small power connectors from the backplanes on the power distrubution panel. The powerfail signal colours are yellow and purple and are on small 6 pin connectors. They should be at about 4.5 volts. If they are below .5 volts or a square wave (its better to check these with a CRO), the you have a power supply problem. Another common failure mode is the power control cards buried in the top of each H742 power supply system (there are two). If the capacitor fails in the AC/DC low sensing (farly common every 10 cpu-years) then the signals are asserted. Also the +15 volt regulator on the same card can also fail (usually because the little fan dies), then the -15 and some other regulaters will not function though the +5's will. One nasty design problem with these power supples is that the AC/DC low circuits only monitor the mains and not the individual regulators. So you have to check the output of each individual regulator as well. John Holden University of Sydney Australia
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Newsgroups: comp.sys.dec Path: arc1-ca.pugleaf.net!sparky!uunet!munnari.oz.au!metro!physiol.su.OZ.AU!cortex.physiol.su.oz.au!johnh From: johnh@cortex.physiol.su.oz.au (John Holden) Subject: Re: PDP 11/T55 Message-ID: <johnh.713406921@cortex.physiol.su.oz.au> Sender: news@physiol.su.OZ.AU (The News System) Nntp-Posting-Host: cortex.physiol.su.oz.au Organization: Department of Physiology, University of Sydney, NSW, Australia References: <wgzm=6p.n1gak@netcom.com> Date: Mon, 10 Aug 1992 00:35:21 GMT Lines: 38