🚀 go-pugleaf

The current 21064 Alpha chip built in the current fab process will run at up to 
200MHZ (and we've never said anything else, to my knowledge).

It is, however, a dual issue processor, which means that it may be able to
start more than one instruction in a single clock cycle; at 200MHZ, it can theoretically 
achieve a PEAK instruction execution rate of 400 million instructions/second (if an good
mix of instructions happen to be available; there are restrictions on what
types of instructions can issue with other types of instructions); so
a combination of these functional unit conflicts, memory latencies
and other situations tha t can stall the processor bring the speed well down from
these peak speeds for most real applications.  See the 21064 chip specification;
you can get copies from gatekeeper.dec.com or crl.dec.com via anonymous FTP.

So a 150MHZ Alpha system can execute up to 300 million instructions/second.
We announced 5 different machines, which run between at clock rates
of between 133MHZ and 200MHZ.

So their PEAK instruction execution rates vary between 266 and 400 million
instructions/second.  In the benchmark data, you will see a yet larger
range of speeds; this is due to different second level cache speeds and sizes on the
different models (the 21064 has a first level, on-chip, cache). 

Hope this clarifies more than it confuses.

-- 
Digital Equipment Corporation
Cambridge Research Laboratory