🚀 go-pugleaf

In article <RICHARD.92Nov12152902@chemeng.stanford.edu>, richard@chemeng.stanford.edu (Richard Schiek) writes:
|>In all the technical blurbs for the new DEC Alpha chip, they call it a
|>300MHz chip.  Yet, in all the new systems that DEC is shipping, the
|>chip is running at 140 MHz max.  Why is it called a 300MHz chip when
|>only 140 MHz systems are for sale?  Is there a problem with getting
|>other components (ie memory) to work with a chip this fast, or is the
|>chip lifetime too short to be feasible at 300 MHz.  

I'm not sure what information you're referring to specifically, but as
others have noted, at 150mHz, or more specifically 6.6ns cycle time, the
theorectical peak instruction rate is 300MIPS.  This is in fact the spec
for the 21064-AA which has been shipping since the spring to anyone who
is interested.  This is rated conservatively; the chip will definitely
work at that speed.  The chips are also being binned for higher speed parts
and there is no problem meeting demand for chips for all systems, even the
DEC 10000 which is at 200mHz.

If you have read the spec on the 21064 chip, you may have read that the input
clock is up to 300mHz; this is used to drive the on chip clock which uses
a doubled clock to more precisely generate the square wave needed.  In other
words, the clock signal into the chip is 300mHz by the cycle time is 6.6ns
or 150mHz.  Actually quoting frequency is rather misleading with most systems
since the thing that is really important is the cycle time.  Consider that
the 486DX2/25 is drive by a 25mHz clock but runs at a 20ns cycle time because
the input clock is doubled to 50mHz.

mulp
DEC