Article View: comp.sys.dec
Article #3129Re: "passive release"? What is it?
From: slsw2
Date: Wed, 13 Feb 1991 19:23
Date: Wed, 13 Feb 1991 19:23
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In article <1991Feb13.131922.46862@cc.usu.edu>, slsw2@cc.usu.edu writes: > Close, but no cigar. You see, the UNIBUS bus requests are really DMA requests. > Once a device has been granted the UNIBUS, it can do anything it wants > including giving a vector to the CPU; note that the CPU is a slave for this > operation, not the master. If the UNIBUS device decides not to give the CPU > a vector, the bus is released and everything goes on its merry way; on a > PDP-11, the bus request is ignored and the CPU is not interrupted. Oh yeah. One thing I've always wondered but have never tried. What happens if a device grabs the UNIBUS with an NPR and then decides to give the processor a vector? Is it a non-maskable interrupt? Anybody ever tried it? -- =============================================================================== Roger Ivie 35 S 300 W Logan, Ut. 84321 (801) 752-8633 ===============================================================================
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!hellgate.utah.edu!fcom.cc.utah.edu!cc.utah.edu!cc.usu.edu!slsw2 From: slsw2@cc.usu.edu Newsgroups: comp.sys.dec Subject: Re: "passive release"? What is it? Message-ID: <1991Feb13.132400.46863@cc.usu.edu> Date: 13 Feb 91 19:23:59 GMT References: <GOEHRING.91Feb11202106@ai.mit.edu> <1991Feb12.044547.1097@spcvxb.spc.edu> <1991Feb13.131922.46862@cc.usu.edu> Organization: ÿÿÿÿ Lines: 19