Article View: comp.sys.dec
Article #4395Re: Alpha fft performance
From: Matthew B. Kirk
Date: Fri, 08 Jan 1993 20:49
Date: Fri, 08 Jan 1993 20:49
52 lines
2894 bytes
2894 bytes
In article <1993Jan7.121038.4845@odin.corp.sgi.com>, jpp@pipo.paris.sgi.com (Jean-Pierre Panziera - SGI PARIS) writes... > I am not familiar with "Alpha's process cycle counter". Is this a simulator ? > Does this tool take in account eventual cache misses ? > How do real benchmark compare with your simulation ? It's in the hardware. From page 4-118, Alpha Architecture Reference Manual (description of RPCC - read process cycle counter): The low order 32 bits of theprocess cycle counter is an unsigned 32 bit integer that increments once per N CPU cycles, where N is an implementation-specific integer in the range 1-16. The cycle counter frequency is the number of times the process cycle counter gets incremented per second, rounded to a 64 bit integer. The integer count wraps to 0 from a count of FFFF FFFF. The counter wraps no more frequently than 1.5 times the implementation's interval clock interrupt period (whichi s two thirds of the interval clock interrupt frequency). The high-order 32 bits of the process cycle counter are an offset that when added to the low-order 32 bits gives the cycle count for this process. The process cycle counter is suitable for timing intervals on the order of nanoseconds and may be used for detailed performance characterization. It is required on all implementations. PCC is required for every processor, and each processor in a multiprocessor system has its own PCC. There is also a 'system cycle counter'. > >|> The algorithm is a radix-4 algorithm, and is basically just a C translation >|> of the FORTRAN code in "DFT/FFT and Convolution Algorithms" by Burrus and >|> Parks (with a few tweaks, of course). > > Are the results of your transform ordered, or are they "bit reversed" ? > >Thanks you in advance. > >--- > ___ ___/ ___ / ___ / Jean-Pierre Panziera > / / / / / jpp@paris.sgi.com > / ______/ ______/ > / / / > _____/ ___/ ___/ ============================================================================= Matthew Kirk kirk@tallis.enet.dec.com All opinions expressed here are mine and do not reflect those of Digital Equipment Corporation. =============================================================================
Technical Details
Message-ID:
<1993Jan8.205008.9844@e2big.mko.dec.com>Path:
arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!wupost!darwin.sura.net!haven.umd.edu!decuac!pa.dec.com!engage.pko.dec.com!e2big.mko.dec.com!tallis.enet.dec.com!kirkShow Full Headers
Complete Article Headers
Newsgroups: comp.sys.dec,comp.dsp Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!wupost!darwin.sura.net!haven.umd.edu!decuac!pa.dec.com!engage.pko.dec.com!e2big.mko.dec.com!tallis.enet.dec.com!kirk From: kirk@tallis.enet.dec.com (Matthew B. Kirk) Subject: Re: Alpha fft performance Message-ID: <1993Jan8.205008.9844@e2big.mko.dec.com> Sender: usenet@e2big.mko.dec.com (Mr. USENET) Organization: Digital Equipment Corporation Date: Fri, 8 Jan 1993 20:49:31 GMT Lines: 52