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Article #111

TI's 0.18 submicron process.

#111
From: Sean C Peters
Date: Fri, 31 May 1996 00:00
127 lines
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Editorial Backgrounder

SC-96025B

TI's 0.18 Micron Process Technology Packs 125 Million Transistors on a
Single Chip
TI's TImeline Technology Enables Lower Cost and Lower Power Consumption
in End-Equipment Applications
One hundred and twenty-five million transistors. That's roughly the
total number of transistors found in a high-end personal computer,
including the CPU, motherboard chips, modem, sound card, hard disk
drive etc: and 16 m
egabytes of dynamic random access memory (DRAM). Now, it's also the
number of transistors that Texas lnstruments can pack onto a single
chip with the newly disclosed TI TImeline Technology.
With its 0.18 submicron process, TI's TImeline Technology brings these
levels of system integration within reach. In many applications,
single-chip systems with their advantages in performance, size, power
conservation an
d cost become practical using TI's Tlmeline Technology and its design
libraries and development tools.
Equally important, the TImeline Technology platform promises to slash
product development cycles dramatically. "With today's average
equipment product life cycle of, say, a laptop computer, extending only
six months, a 3D
-day delay in introducing a new product can mean failure. It's critical
to move through the design cycle quickly," said Rich Templeton, TI
Semiconductor Group senior vice president and worldwide manager of its
application
 specific products business. "To create the tightest, most elegant
solution may take a year or more. But with all of the capabilities that
our TImeline Technology provides, the design cycle drops to a few
months. TI's TIm
eline Technology allows engineers to drop large quantities of existing
circuitry into a design rather than designing it all from scratch.
That's the key to taking advantage of the unprecedented integration
capabilities of
fered by Tlmeline Technology and getting to market quickly."
Designers will be able to select microprocessor or customizable digital
signal processor (cDSPTM) cores and surround them with other needed
modules without great concern about exceeding the chips transistor
capacity. Such
 capacity also eliminates the need to coordinate the efforts of a DSP
vendor, an application specific integrated circuit (ASIC) vendor, a
tool maker and a foundry. The entire system can come from one source.
The luxury, from a design standpoint, of 125 million transistors on a
single piece of silicon also opens the door to powerful new
combinations of processors. For example, a single chip could easily
contain as many as 20 o
f the microprocessors that are the brains of today's high-end PCs. Such
a combination would provide computing power and speed far beyond
anything expected in the next several generations of conventional
development.
"Once you have all of these processors on a single chip, you probably
wouldn't want them all to be general purpose microprocessors," said
Michael Hames, TI Semiconductor Group vice president and worldwide DSP
manager. "Wh
at you would find is that, rather than compromising to build processors
capable of multiple tasks, you would have a sequence or series of
processors, each of which does one thing very well. You might have a
reduced instru
ction set computing (RISC) machine, a servo-controller, a video
controller and so on along with a few general processors to handle true
multi-tasking."
TI already takes this multi-processor approach in some products. For
example, the TMS320C80 DSP combines four DSPs and a RISC controller on
a single piece of silicon. Capable of two billion operations per
second, the `C80
 is the most powerful DSP on the market today. With TI's Timeline
Technology, however, arrays of DSPs on one chip could readily deliver
several times as much performance.
 
And performance barriers inherent in current designs can be overcome
quickly with the 125-million transistor density of TI's Timeline
Technology. For example, DSPs today are limited to about 50 and 100
million instruction
s per second (MIPS) because they must communicate with memory located
on separate microchips. The Tlmeline Technology platform permits
combinations of DSPs and static random access memory (SRAM) on the same
chip, permitti
ng much faster communication, hence, significantly more MIPS.

For applications, such as telecommunications, in which performance is
essential, 125-million transistor capability holds enormous promise.
Such capacity permits many information channels and switching
capability on one ch
ip. This enables lower cost in telephone systems and facilitates the
movement of huge quantities of data required by videoconferencing,
multimedia communications and other likely demands of the networked
society.

Cellular telephones and personal communications systems (PCS) may not
need 125-million transistor density. Still, they will benefit from
another feature of the Tlmeline Technology: low power consumption. A
device will be 
capable of performance at 300 MHz, 500 MHz or more at 1.8V, but it will
be able to deliver the 100 MHz needed by wireless sets at only IV. This
means smaller, lighter weight batteries can provide more talk and
standby tim
e to users. And as designers enhance features such as noise canceling,
they�ll have room on the chip to add them efficiently.

In hard disk drives, where system size and cost are major competitive
factors, 125-million transistor technology offers important advantages.
TI's TImeline Technology will permit drive makers to combine
servo-control, FLA
SH memory and other modules into one device. It will help them reduce
their chip count from today's six or eight to no more than two. One
chip could do the job if all of the analog functions can be integrated
into the sil
icon.

Whether they are concerned most about performance, size, power
consumption or system cost, equipment makers clamor for greater
semiconductor integration. They want the technical advantages they gain
from greater silicon c
apacity. And they demand the reduced development time available through
the use of existing cores and application-specific modules.

'TI�s Tlmeline Technology, with 125-million transistor capacity, low
power requirement and lightning performance potential opens a new era
for these equipment manufacturers. It clears the way for a multitude of
new or adv
anced products to the wallet PC, the Dick Tracy� wristwatch and
hundreds of other products barely imaginable are just on the horizon.
TI's Timeline Technology will help make them possible.
Technical Details
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From: nwe@ix.netcom.com(Sean C Peters)
Subject: TI's 0.18 submicron process.
Date: 1996/05/31
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x-netcom-date: Fri May 31  7:08:28 AM PDT 1996
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