🚀 go-pugleaf

On Sun, 21 Jun 1998 17:18:47, "Doug Chism" 
<chismdm@earthlink.net> wrote:

> 
> \>AMD has started designing their chips since the K5.
>  Yeah - after Intel designed and released an instruction set.
> 
> >Not only do they have to
> >do that, they have to take into consideration compatibility with intel
> >standards.
> 
> Its a lot easier to design a chip to a spec then to come up with a design
> from scratch.

Have you done either?  I suggest that you are wrong.  It is 
*very* difficult to clone a chip with all of it's "strangeness" 
and make it better.  There are many gotchas that aren't in the 
specs.  In fact there are things in "errata" that may not be 
known to the cloner.  Clean rooom and all.

> >Intel on the other hand can just about do anything and get away
> >with it (Slot 1 for example).
> 
> You think its easy to design something like that? It takes the work of
> dozens of electrical, computer and mechanical engineers to get a new slot
> design working!

Please!  I hope it was easy to design.  It's a crock.  Yes, I'm 
an EE.  Slot1 was not designed by engineers, rather by marketeers
or accountants.  It is a rotten form-factor for a bus.  Look at 
the additional wire lengths!  Yuck!

> >AMD has to design a faster and cheaper chip that
> >is also compatible. That's gotta be harder.
> 
> No - they have the Intel chip as a roadmap. Where do you get your ideas
> from? You are obviously not an engineer or a manager.

Nor are you, quite obviously.  It is not a piece of cake cloning 
an architecture and IMHO AMD did a spectacular job of whipping 
Intel at the pentium architecture game.  The K6 has a very nice 
micro-architecture allowing things like the K6-3D to be roled out
in a timely manner.

> >You definitely have your facts wrong. The AMD K6 has 64Kb of L1 cache
> compared
> >to only 32Kb on Pentium MMX and Pentium2 chips. Before that classic
> Pentiums
> >only have 16Kb cache. Using your argument on the price of cache, AMD chips
> >should be more expensive, but they're not!
> 
> The pentiums have 512k l2 cache - the AMD chips have none - zero. So total
> cache memory Intel : 512+32k, AMD 64k. I think you have the facts wrong.

Please.  Don't get so emotional that you sound like a blithering 
idiot.  Sure the motherboard does the L2 bit.  So what?  Look at 
the price/performance.  PII was a descision by pointy-haired 
managers, not engineers.  It is an abomination technically.

> Alpha CPU's start at 1 MB L2 cache and can handle up to 4 MB. L1 is on chip
> cache and hogs real-estate, thats why most manufacturers switch to an
> external L2 cache and design a BUS that will hit that cache at speed - or
> near processor speed.

Point?

> >Well, as I've said, they can afford it, since they have the lion's share on
> >the market as well as a reputation.
> 
> Thats bullshit - any techincal manager knows that you dont include
> "reputation" in your pricing forcasts. They are based on profit margins and
> revenue - leveraged against costs, both in maufacturing and incurred during
> design.

Any technical manager doesn't get all emotional about an article 
on the USENET. However, I thought this was a technical group, not
a management one.  Maybe it's time to get your points trimmed.

----
  
  Keith R. Williams
  krw@ibm.net