Re: 1X3 Sim Memory

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#19096

From: Thomas D. Barrett
Date: Wed, 06 Jan 1993 15:24

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In article <1993Jan6.024656.26446@nuscc.nus.sg> isc10085@nusunix1.nus.sg (NG YENG YONG) writes:
>The 1x3's SIMM are actually 2 x 4MBits RAM & 1 x 1MBits RAM Chips. The
>1MBits Chip is for Parity checking. They are actually the same as the
>older 1x9's SIMM.

The same as long as the system supported 4M parts (which this one
obviously did), but older systems may not properly refresh the 4M
parts.
-- 
|Tom Barrett (TDBear), Sr. Engineer|tom.barrett@amd.com|v:512-462-6856 |
|AMD PCD MS-520 | 5900 E. Ben White|Austin, TX  78741  |f:512-462-5155 |
|"No is yes, And we're all free" ---Tracy Chapman, "Why?"              |
|My views are my own and may not be the same as the company of origin  |

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Message-ID: <1993Jan6.152420.21897@dvorak.amd.com>

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Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!sun-barr!olivea!veritas!amdcad!dvorak.amd.com!tdbear
From: tdbear@dvorak.amd.com (Thomas D. Barrett)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: 1X3 Sim Memory
Message-ID: <1993Jan6.152420.21897@dvorak.amd.com>
Date: 6 Jan 93 15:24:20 GMT
References: <1id8dtINNqbd@usenet.INS.CWRU.Edu> <1993Jan6.024656.26446@nuscc.nus.sg>
Organization: Advanced Micro Devices, Inc.; Austin, Texas
Lines: 13

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