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Article #19811Re: SRAM cache vs cache
From: NG YENG YONG
Date: Mon, 11 Jan 1993 10:29
Date: Mon, 11 Jan 1993 10:29
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Sorry about the previous post. All cache are implemented using SRAM - Static Random Access Memory, because only SRAM presently has access time less than 25 ns. Best regards, Steve =========================================================================== = = = = Ng Yeng Yong, Steve = Life is short, = = ISC10085@NUSUNIX1.NUS.SG = Play Hard, = = 1st Year, Computer Science = Work Hard, = = Department of Information System = Have Fun. = = and Computer Science (DISCS) = So, let our hair down = = National University of Singapore (NUS) = and have lots of fun. = = = = ===========================================================================
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<1993Jan11.102924.13228@nuscc.nus.sg>Path:
arc1-ca.pugleaf.net!sparky!uunet!usc!cs.utexas.edu!qt.cs.utexas.edu!yale.edu!jvnc.net!newsserver.jvnc.net!newsserver.technet.sg!nuscc!nusunix2.nus.sg!isc10085References:
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Newsgroups: comp.sys.ibm.pc.hardware Path: arc1-ca.pugleaf.net!sparky!uunet!usc!cs.utexas.edu!qt.cs.utexas.edu!yale.edu!jvnc.net!newsserver.jvnc.net!newsserver.technet.sg!nuscc!nusunix2.nus.sg!isc10085 From: isc10085@nusunix1.nus.sg (NG YENG YONG) Subject: Re: SRAM cache vs cache Message-ID: <1993Jan11.102924.13228@nuscc.nus.sg> Sender: usenet@nuscc.nus.sg Organization: National University of Singapore X-Newsreader: TIN [version 1.1 PL6] References: <palane.726703117@pv7426.vincent.iastate.edu> Date: Mon, 11 Jan 1993 10:29:24 GMT Lines: 22