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Article View: comp.sys.ibm.pc.misc
Article #3673

Re: **** PHEONIX 386 BIOS QUESTION IN MY ZEOS LAPTOP! ****

#3673
From: Alan T. Krantz
Date: Thu, 04 Oct 1990 11:54
29 lines
1921 bytes
In article <Ub2GZmy00WB9AUz69i@andrew.cmu.edu> jc58+@andrew.cmu.edu (Johnny J. Chin) writes:
>80386 BIOS have a feature called "shadow ram".
>
>On some BIOSes, you can disable the "shadow ram" and free up the memory
>space between 640k and 1Mb.  Some BIOSes will still reserve this space
>even if you disabled the "shadow ram".  But, by disabling the "shadow ram",
>you will cause the computer to operate slower due the the "far" reference
>for ever BIOS interrupt call.
>
>

I don't believe this is correct. The addresses (as far as the program is
concerened) is the same if the bios is executed from RAM or ROM. The
differences is that the ROM has a much slower access time hence wait
states are probably inserted when code is executed from ROM. Actually,
I'm not too sure how this is done - I've wired up a 68xxx before and it
wasn't too difficult to dynamicly set the number of wait states - but
I'm not sure how it's done on the intel chips  -  but in any event it
has nothing to do with "far" references....




 
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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!samsung!zaphod.mps.ohio-state.edu!ncar!boulder!atk
From: atk@boulder.Colorado.EDU (Alan T. Krantz)
Newsgroups: comp.sys.ibm.pc.misc,comp.binaries.ibm.pc.d,comp.sys.laptops
Subject: Re: **** PHEONIX 386 BIOS QUESTION IN MY ZEOS LAPTOP! ****
Message-ID: <27514@boulder.Colorado.EDU>
Date: 4 Oct 90 11:54:24 GMT
References: <Ub2GZmy00WB9AUz69i@andrew.cmu.edu>
Sender: news@boulder.Colorado.EDU
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Organization: University of Colorado, Boulder
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