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Article View: comp.sys.ibm.pc.misc
Article #5956

Re: Parity error - HALT - a better NMI handler?

#5956
From: Robert Wiegand
Date: Thu, 05 Nov 1992 14:45
38 lines
2141 bytes
chuck.colford@synapse.org (Chuck Colford) writes:

>To: comp.sys.ibm.pc.misc
>From: chuck.colford@synapse.isis.org

>Alas; I am not alone.  I am plagued by the occasional parity error too.
>Chris Granitz recently recanted his story & it sounds all too familier.
>I'm a H/W engineer, so I've gone through most of what I can check (mem
>speeds, cache data/tag ram speeds, bus speeds, looked for "pushed
>parts", etc).  Still they persist, but I hate to turn off checking.

>Speeds of 33 MHz and up are challenging & require good design & layout
>practice.  Perhaps all the clone designs do not all allow adequate
>margins.

>What I would really like to see is a program (TSR or config.sys driver)
>that would intrcept the NMI and report the address & byte where it
>thinks the error occurred.  This should be a protected mode program &
>windows compatable.  This would be more inspiring than PARITY ERROR -
>SYSTEM HALTED.

>Does anyone have such a program?  If so, I would appreciate an email
>copy.

>...Chuck
>                              

I don't think this is possible. This would require hardware to latch the
address on the bus when the error occures. There is no way to do this
with just software. Software may be able to give you help sometimes
by looking at the processor state, but it can't catch errors that
occur during DMA and will give incorrect information.

-- 
------------------------------------------------------------------------------
Robert Wiegand - Motorola Inc.
motcid!wiegand@uunet.uu.net            uunet!motcid!wiegand
Disclamer: I didn't do it - I was somewhere else at the time.
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References: <3132.2404.uupcb@synapse.org>

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From: wiegand@rtsg.mot.com (Robert Wiegand)
Subject: Re: Parity error - HALT - a better NMI handler?
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Organization: Motorola Inc., Cellular Infrastructure Group
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Date: Thu, 5 Nov 1992 14:45:16 GMT
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