Article View: comp.sys.ibm.pc.misc
Article #678486's with 0 wait states?
From: Joseph Landman
Date: Tue, 11 Aug 1992 12:48
Date: Tue, 11 Aug 1992 12:48
29 lines
2056 bytes
2056 bytes
Fellow Nettoids: I had recently upgraded my home machine from an old 10Mhz 8088 to a 25Mhz 80386sx. While I enjoyed the increase in speed, I noted that the 386sx has 6 wait states between memory reads/writes in 8 bit mode (and 11.5 in 32 bit mode). This really annoys me. I am aware that I could drop in a cache ( there is a slot for the optional card), but 32k is not nearly enough, and my code uses larger arrays in extended memory (therefore many cache misses). So, on to the point. I would like to know if there are any motherboards that are not as badly memory bandwidth limited, that have at most 1 wait state between main memory, and the processor, without a cache. I am thinking 386 or 486 motherboards (I am not even remotely interested in 486sx). I have heard that a board called the "cheetah" or similar has this property. Or, if possible, is there mother board with a 1MB cache on it? ( my arrays tend to be >3MB each). I would like to hear about peoples experiences with such beasts. Thanks for the info, I will post a summary if there is enough interest. Joe Landman landman@hal.physics.wayne.edu #,:::::::;, :: Joe Landman Graduate Student (PhD), # :: :: Computational Solid State Physics. #;: :: :: Physics Dept., Wayne State Univ. #`::::; oe ;:::; andman 666 Hancock Avenue, Detroit MI 48202 #Internet: landman@hal.physics.wayne.edu landman@rhic2.physics.wayne.edu # kil@pandora.cs.wayne.edu jland@ss0.eng.wayne.edu #ATTnet: (313) 577-2720
Technical Details
Message-ID:
<landman.69.713537313@hal.physics.wayne.edu>Path:
arc1-ca.pugleaf.net!sparky!uunet!elroy.jpl.nasa.gov!usc!sol.ctr.columbia.edu!destroyer!wsu-cs!splat.physics.wayne.edu!landmanShow Full Headers
Complete Article Headers
Newsgroups: comp.sys.ibm.pc.misc Path: arc1-ca.pugleaf.net!sparky!uunet!elroy.jpl.nasa.gov!usc!sol.ctr.columbia.edu!destroyer!wsu-cs!splat.physics.wayne.edu!landman From: landman@hal.physics.wayne.edu (Joseph Landman) Subject: 486's with 0 wait states? Message-ID: <landman.69.713537313@hal.physics.wayne.edu> Summary: expensive if they exist. Sender: usenet@cs.wayne.edu (Usenet News) Organization: Department of Physics and Astronomy Date: Tue, 11 Aug 1992 12:48:33 GMT Lines: 29