Article View: comp.sys.ibm.pc.rt
Article #418Re: integer alignment problems on RT
From: John F Carr
Date: Sat, 07 Oct 1989 02:46
Date: Sat, 07 Oct 1989 02:46
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1200 bytes
>If the RT was being
>designed today I'm sure that it would have implemented an Interrupt on
>Unaligned Access bit in the ICS register.
I found this comment in the AOS kernel sources (sys/locore.c):
/*
* determine the processor model (either SGP or ROMPC) by setting
* the Interrupt On Unaligned Access bit which is always 0 on the SGP
* processor.
*/
This is the only reference anywhere I have seen to the bit in question.
The technical reference describes this bit as "reserved -- must be 0".
Someday I'll try setting this bit to see what happens.
--John Carr (jfc@athena.mit.edu)
Technical Details
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<14927@bloom-beacon.MIT.EDU>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!ginosko!gem.mps.ohio-state.edu!tut.cis.ohio-state.edu!bloom-beacon!athena.mit.edu!jfcReferences:
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!ginosko!gem.mps.ohio-state.edu!tut.cis.ohio-state.edu!bloom-beacon!athena.mit.edu!jfc From: jfc@athena.mit.edu (John F Carr) Newsgroups: comp.sys.ibm.pc.rt Subject: Re: integer alignment problems on RT Keywords: RT 6150 032 ROMP alignment Message-ID: <14927@bloom-beacon.MIT.EDU> Date: 7 Oct 89 02:46:40 GMT References: <162@eliza.edvvie.at> <2396@ibmpa.UUCP> Sender: daemon@bloom-beacon.MIT.EDU Reply-To: jfc@athena.mit.edu (John F Carr) Organization: Massachusetts Institute of Technology Lines: 18