Expansion Bus Interface Spec's for DMA Bus Master

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Article #41074

#41074

From: Dante Fabrizio - PA
Date: Tue, 09 Jan 1990 14:32

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Can anyone recommend a detailed reference of specifications of the signals 
on a pc AT compatible expansion bus for DMA BUS Master interfacing techniques. 
I have the technical reference manual but, only general signal desriptions are 
covered.
I need to know how to decode REFRESH so I don't conflict with memory refresh
cycle. Are there any good books or sources of timing diagrams available? Please
email any responses.

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Message-ID: <9262@cbmvax.commodore.com>

Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!rutgers!cbmvax!danf

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!rutgers!cbmvax!danf
From: danf@cbmvax.commodore.com (Dante Fabrizio - PA)
Newsgroups: comp.sys.ibm.pc
Subject: Expansion Bus Interface Spec's for DMA Bus Master
Keywords: DMA BUS MASTER
Message-ID: <9262@cbmvax.commodore.com>
Date: 9 Jan 90 14:32:13 GMT
Reply-To: danf@cbmvax.commodore.com (Dante Fabrizio - PA)
Organization: Commodore, West Chester, PA
Lines: 7