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Article #42514

Re: EISA 33 Mhz boards vs non EISA. Was: 20 Mhz 386 SX (?)

#42514
From: $anjay "lock-on" $ingh - Indy St...
Date: Fri, 16 Feb 1990 17:22
31 lines
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In article <2221@ultb.isc.rit.edu> cms2839%ritvax.bitnet@cunyvm.cuny.edu writes:
>				that's funny . i've got the issue right
>here , and it says that the Editor's Choices were the AST , the _Austin_
>, and the Zeos ...
>
Sorry for the mistake. I must have confused all the good things that have
been said about gateway's machines with the stuff in the magazine. I
stand corrected.


I was wondering about the competing bus standards, EISA and Micro Channel.
Not being too familiar with PC architectures yet (my last machine was a 64)
I was wondering if someone could explain what this means for PC board
performance for peripherals and CPU throughput. 

In other words, how does it work? Or where can I go to find out?

It doesn't appear to be
as simple as the SX/DX confusion, where all we are talking about is
memory bus bandwidth. If this question has been asked before, I'm sorry.
Perhaps it could be taken care of in the frequently-asked-questions file
that is currently being prepared.  

Thank you.


-- 
"Nobody had the guts...until now..."
|-$anjay "lock [+] on" $ingh	ssingh@watserv1.waterloo.edu	N.A.R.C. ]I[-|
"A modern-day warrior, mean mean stride, today's Tom Sawyer, mean mean pride."
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Message-ID: <1132@watserv1.waterloo.edu>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!watserv1!ssingh
References: <1109@watserv1.waterloo.edu> <2221@ultb.isc.rit.edu>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!watserv1!ssingh
From: ssingh@watserv1.waterloo.edu ($anjay "lock-on" $ingh - Indy Studies)
Newsgroups: comp.sys.ibm.pc
Subject: Re: EISA 33 Mhz boards vs non EISA. Was: 20 Mhz 386 SX (?)
Message-ID: <1132@watserv1.waterloo.edu>
Date: 16 Feb 90 17:22:57 GMT
References: <1109@watserv1.waterloo.edu> <2221@ultb.isc.rit.edu>
Reply-To: ssingh@watserv1.waterloo.edu ($anjay "lock-on" $ingh - Indy Studies)
Distribution: comp
Organization: U. of Waterloo, Ontario
Lines: 31