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Article #1463

Parity on iAPX x86 chips

#1463
From: Marc WANDSCHNEIDER
Date: Tue, 12 Jan 1993 17:10
14 lines
1007 bytes

I've noticed that most of the x86 chips I have programmed have a Parity
bit.  I was just wondering if they actually compute this every time an
operation is done, or if they just get this from memory (ie, is the parity
bit valid after EVERY operation, or just loads from memory...?)

Toodlepip!
Marc 'em.
-- 
  storm@cs.mcgill.ca           McGill University         "-- Attack ships on
  Marc Wandschneider           Montreal, CANADA             fire "
	Any opinions expressed are not mine, but those of the Demon Lord
      Yeegeheeegenogohugu who possessed me whilst I munched on Raisin Bran.
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Newsgroups: comp.sys.intel
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From: storm@cs.mcgill.ca (Marc WANDSCHNEIDER)
Subject: Parity on iAPX x86 chips
Message-ID: <C0r3oq.4Hu@cs.mcgill.ca>
Sender: news@cs.mcgill.ca (Netnews Administrator)
Organization: SOCS - McGill University, Montreal, Canada
Date: Tue, 12 Jan 1993 17:10:02 GMT
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