Article View: comp.sys.intel
Article #167Re: 486sx questions
From: Marc WANDSCHNEIDER
Date: Tue, 04 Aug 1992 00:46
Date: Tue, 04 Aug 1992 00:46
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In article <1992Aug3.142634.3470@socrates.umd.edu> doug@UC780.UMD.EDU writes:
>In article <0105010F.9tfk8f@mpr.mpr.com>, mslater@mpr.com (Michael Slater) writes:
>
>Ok, but does the Cx486DLC = Intel 486? (i.e.: built-in math co-processor, full
>instruction set) Or do you have to buy a Cx487 ?
>
The Cyrix chips only have a 1k cache, and do not implement all the
scary pipelining things that the 486 does for performance boosts. It does
not have a math coprocessor, and the SLC only has a 16bit bus while the DLC
has a 32bit bus.... However, as far as I understand, they DO implement all
the non-floating point 486 instructions.....
Marc 'em.
--
storm@cs.mcgill.ca McGill University C program run. Run
Marc Wandschneider Montreal, CANADA Program run! PLEASE!
"When 900 years old you reach, look as good you will not." - Yoda
"Ow!" -J.F.K.~
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Newsgroups: comp.sys.intel Path: arc1-ca.pugleaf.net!sparky!uunet!snorkelwacker.mit.edu!thunder.mcrcim.mcgill.edu!homer.cs.mcgill.ca!storm From: storm@cs.mcgill.ca (Marc WANDSCHNEIDER) Subject: Re: 486sx questions Message-ID: <1992Aug4.004610.11743@cs.mcgill.ca> Sender: news@cs.mcgill.ca (Netnews Administrator) Organization: McGill University, Montreal, Canada References: <0105010F.9tfk8f@mpr.mpr.com> <1992Aug3.142634.3470@socrates.umd.edu> Date: Tue, 4 Aug 1992 00:46:10 GMT Lines: 20